A Silicon-based Hardware for Quantum Computing

A Silicon-based Hardware for Quantum Computing

Title: A Silicon-based Hardware for Quantum Computing.
When: Thursday, 1st March, 2018, at 12:00.
Place: Sala de Conferencias, Módulo 00, Facultad de Ciencias, Universidad Autónoma de Madrid.
Speaker: M. F. Gonzalez-Zalba, Hitachi Cambridge Laboratory, UK.

The silicon metal-oxide-semiconductor transistor is the workhorse of the microelectronics industry. It is the building block of all major electronic information processing components such as microprocessors, memory chips and telecommunications microcircuits. By shrinking its size generation after generation the computational performance, memory capacity and information processing speed has increased relentlessly. However, the process of miniaturization is bound to reach its fundamental physical limits in the next decades.

New computing paradigms are hence paramount to overcome the technical limitations of silicon technology and continue increasing the computation performance beyond simple multi-core approaches. Quantum computing – based on computing with interacting two-level quantum systems or qubits- offers exponential speed-up over several classical algorithms [1-3] and it is hence one of the most sought-after alternatives to conventional computing. However, finding the optimal physical system to process quantum information and scale it up to the large number of qubits necessary to run the aforementioned algorithms remains a major challenge. Paradoxically, we are now starting to see that silicon technology itself could offer an optimal platform on which to fabricate spin-based scalable quantum circuits: Quantum computing with silicon transistors fully profits from the most established industrial technology to fabricate large scale integrated circuits while facilitating the integration with conventional electronics for fast data processing of the binary outputs of the quantum processor; all this offering long electron spin coherence times [4].

In this talk, I will present a series of results on fully depleted silicon-on-insulator (FD-SOI) transistors at miliKelvin temperatures that show this technology could provide a platform on to which implement electron-spin qubits [5-10]. Additionally, I will present a set of experiments that demonstrate the potential to scale FD-SOI technology to a large number of qubits and interface them naturally with conventional digital electronics [11-12].


  1. P.W. Shor, SIAM Journal on Computing 26 (1997) 1484.
  2. L. K. Grover, Phys. Rev. Lett 79 (1997) 325.
  3. D. Poulin, Quantum Inf. & Comput. 15 (2015) 361.
  4. M. Veldhorst, Nature, 526 (2015), 410.
  5. A. C. Betz, M. F. Gonzalez-Zalba, Nano Lett. 15 (2015) 4622.
  6. M. F. Gonzalez-Zalba, Nat. Commun. 6 (2015) 6084.
  7. M. Urdampilleta, M. F. Gonzalez-Zalba, Phys. Rev. X 5 (2015) 031024.
  8. M. F. Gonzalez-Zalba Nano Lett. 16 1614 (2016).
  9. R. Mizuta, M. F. Gonzalez-Zalba, Phys. Rev. B 95 (2017) 045414.
  10. A. Chatterjee, M.F. Gonzalez-Zalba Phys. Rev. B 97 045405 (2018).
  11. A. C. Betz, M. F. Gonzalez-Zalba, App. Phys. Lett. 108 (2016) 203108.
  12. S. Schaal, M. F. Gonzalez-Zalba, arXiv:1708.04159.

A Silicon-based Hardware for Quantum Computing

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